Rochester Institute of Technology                                  
Electrical and Microelectronic Engineering

Webpage: Dr. Lynn Fuller
    email:   Lynn.Fuller@rit.edu

Notes on RIT CMOS Processes, Testing and Design

RIT is supporting two different CMOS process technologies.  The older p-well CMOS and SMFL-CMOS have been phased out.  The SUB-CMOS process is used for standard 5 Volt Digital and Analog integrated circuits.  This is the technology of choice for teaching circuit design and fabricating CMOS circuits at RIT.  The ADV-CMOS process is intended to introduce our students to process technology that is close to industry state-of-the-art.  The ADV-CMOS process is used to build test structures and develop new process technologies at RIT.

RIT p-well CMOS   Lambda = 4 um, Lmin = 8 um (no longer supported)
RIT SMFL-CMOS  Lambda = 1 um, Lmin = 2 um (being phased out)
RIT Sub-CMOS  Lambda = 0.5 um, Lmin = 1.0 um, Leff < 1.0um
RIT Advanced-CMOS Lambda = 0.25 um, Lmin = 0.5 um, Leff ~0.30um
To RIT SPICE Modelspic
Document
Presentations
Processes
 
SUB-CMOS Chip Design
CMOSTestchip2009.pdf
 
SUB-CMOS Process Details (Leff < 1.0 um)
SUB-CMOS-Presentation
 
Pictures of John Galt Chip at Various Steps in the Sub-CMOS Process
Sub-CMOS_Pictures.pdf
 
SUB-CMOS Process and Device Calculations
Hand Calc Adv CMOS.pdf
 
RITs ADV-CMOS Process Details (Leff ~ 0.30um)
AdvCMOS2014.pdf
 
Testing    
Factory CMOS Wafer Testing
ICS Test Setups
Factory ICS Test Setups
Recent Parametric Test Results
Testing of CMOS Integrated Circuits
CMOSTEST Manual.pdf
CMOSTEST.pdf
FAC SUB.ics
TestResults.ppt
CMOS IC Test.pdf
 
Wafer Map for NMOSFET and PMOSFET
NMOS_TEST_DATA.xls
PMOS_TEST_DATA.xls
 
Test Results for John Galt Testchip
CMOSTestingJohnGalt1.pdf
CMOSTEST.pdf
Parameter Extractor.xls
 
SPICE Parameters 
 
Linear Technology LTSPICE
Intro to LTSPICE Video
RIT SPICE Models
Intro to LTSPICE.pdf
Intro to LTSPICE.wmv
LTSPICE MODELS.txt
Intro to LTSPICE
SPICE MOSFET Models for RIT CMOS Processes
SPICE MOSFET Model Calculator
 SPICE MOSFET Models.pdf
SPICE Parameter Calc.XLS
Intro SPICE_MOSFET_Models
SPICE MOSFET Models
Introduction to SPICE for EE Labs
SPICE Examples
More SPICE Examples
OrCAD_PSPICE_Intro.pdf
SPICE EXAMPLES.pdf
More SPICE EXMPLES.pdf
OrCAD_PSPICE_Intro
SPICE Examples

More SPICE Examples
Design
 
 Introduction to Mentor Graphics IC Layout
 VLSI_CAD.pdf
 
Intro to Digital IC Design
IntroDigitalElectronics.pdf